1. Field of the Invention
The present invention relates to the field of semiconductor wafer processing and, more particularly, to a chamber and the utilization of the chamber for depositing and/or removing a material on a semiconductor wafer.
2. Background of the Related Art
In the manufacture of devices on a semiconductor wafer, it is now the practice to fabricate multiple levels of conductive (typically metal) layers above a substrate. The multiple metallization layers are employed in order to accommodate higher densities as device dimensions shrink well below one micron design rules. Likewise, the size of interconnect structures will also need to shrink, in order to accommodate the smaller dimensions. Thus, as integrated circuit technology advances into the sub-0.25 micron range, more advanced metallization techniques are needed to provide improvements over existing methods of practice. Part of this need stems from the use of new materials.
For example, one common metal used for metallization on a wafer is aluminum. Aluminum is used because it is relatively inexpensive compared to other conductive materials, it has low resistivity and is also relatively easy to etch. However, as the size of the various geometry is scaled down to a low sub-micron level, the inherent high current density and electromigration properties associated with aluminum start to manifest as significant problems. Some improvement has been achieved by the use of other metals (such as the use of tungsten for via plugs) in conjunction with aluminum, but the inherent properties of aluminum still limits its effective use.
One approach has been to utilize copper as the material for some or all of the metallization of a semiconductor wafer (see for example, "Copper As The Future Interconnection Material;" Pei-Lin Pai et al.; Jun. 12-13, 1989 VMIC Conference; pp. 258-264). Since copper has better electromigration property and lower resistivity than aluminum, it is a more preferred material for providing metallization on a wafer than aluminum. In addition, copper has improved electrical properties over tungsten, making copper a desirable metal for use as plugs (inter-level interconnect) as well. However, one serious disadvantage of using copper metallization is that it is difficult to deposit/etch. It is also more costly to implement than aluminum. Thus, although enhanced wafer processing techniques are achieved by copper, the potential cost associated with copper processing is a negative factor. Accordingly, it is desirable to implement copper technology, but without the associated increase in the cost of the equipment for copper processing.
In order to fabricate features, circuits and devices on a substrate, such as a semiconductor wafer, various techniques are known to deposit and etch materials on the wafer. Deposition techniques include processes such as, PVD, CVD, sputtering and immersion of the wafer in an electrolyte. This last technique can be used for either electroless deposition or for electroplating. In an electroplating technique, the substrate is immersed in an electrolyte and positioned in an electric field between a cathode and an anode, in which charged particles are deposited onto the surface of the wafer (see for example, U.S. Pat. No. 5,441,629, which is titled "Apparatus And Method Of Electroplating").
Similarly, a number of techniques are known for removing a material from a wafer. These techniques include, RIE, plasma etching, chemical-mechanical polishing and immersion in an electrolyte. Material removal by subjecting an immersed wafer to an electric field employs an equivalent set-up as for electroplating, but with an opposite result, since charged particles are removed from the wafer in this instance.
The present invention employs electroplating/electropolishing techniques in which a material is deposited/removed from a substrate. The techniques are implemented in a novel processing tool, which is adapted and described in reference to the use of copper for metallization. Accordingly, the present invention provides material deposition by electroplating and/or material removal by electropolishing, wherein the described techniques can be economically implemented for the mass production of semiconductor products. Furthermore, these techniques can be effectively utilized for copper metallization on a silicon wafer.